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SMBus/I 2 C Interfaced 4-Port, Level-Translating
GPIOs and LED Drivers
EXTERNAL
OSCILLATOR
0MHz TO 1MHz
P2/OSCIN
MAX7306
P2/OSCIN
MAX7306
P2/OSCIN
MAX7306
EXTERNAL
OSCILLATOR
0MHz TO 1MHz
P2/OSCIN
MAX7306
P3/OSCOUT
P2/OSCIN
MAX7306
P3/OSCOUT
P2/OSCIN
MAX7306
Figure 5. Synchronizing Multiple MAX7306s (External Clock)
PWM and Blink Timing
The MAX7306/MAX7307 divide the 32kHz nominal
internal oscillator OSC or external clock source OSCIN
frequency by 32 to provide a nominal 1kHz PWM fre-
quency. Use the reset function to synchronize multiple
MAX7306s that are operating from the same OSCIN, or
to synchronize a single MAX7306/MAX7307’s blink tim-
ing to an external event. Configure the RST input to
reset the internal timing counters used by PWM and
blink by setting bit D1 of the device configuration regis-
ter 0x26 (see Table 3).
The MAX7306/MAX7307 use the internal oscillator by
default. Configure port P2 using device configuration
register 0x27 bit D2 (see Table 4) as an external clock
source input, OSCIN, if the application requires a par-
ticular or more accurate timing for the PWM or blink
functions. OSCIN only applies to PWM and blink; the
MAX7306/MAX7307 always use the internal oscillator for
debouncing and bus timeout. OSCIN can range up to
1MHz. Use device configuration register 0x27 bit D3
(see Table 2) to configure port P3 as OSCOUT to out-
put a MAX7306/MAX7307 ’s clock. The MAX7306/
MAX7307 buffer the clock output of either the internal
oscillator OSC or the external clock source OSCIN,
according to port D2 ’s setup. Synchronize multiple
MAX7306s without using an external clock source input
by configuring one MAX7306 to generate OSCOUT
from its internal clock, and use this signal to drive the
remaining MAX7306s’ OSCIN.
A PWM period contains 32 cycles of the nominal 1kHz
PWM clock (see Figure 6). Set ports individually to a
PWM duty cycle between 0/32 and 31/32. For static
logic-level low output, set the ports to 0/32 PWM, and
for static logic-level high output, set the port register to
0111xxxx (see Table 8). The MAX7306/MAX7307 stag-
ger the PWM timing of the 4-port outputs, in single or dual
ports, by 1/8 of the PWM period. These phase shifts dis-
tribute the port-output switching points across the PWM
period (see Figure 7). This staggering reduces the di/dt
output-switching transient on the supply and also
reduces the peak/mean current requirement.
All ports feature LED blink control. A global blink period
of 1/8 second, 1/4 second, 1/2 second, 1, 2, 4, or 8
seconds applies to all ports. See Table 9. Any port can
blink during this period with a 1/16 to 15/16 duty cycle,
adjustable in 1/16 increments. See Table 10. For PWM
fan control, the MAX7306/MAX7307 can set the blink
frequency to 32Hz.
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